RSA Encryption Core Implementation on FPGA for Secure Data Transmission in IoT Networks

Abstract: The proliferation of Internet of Things (IoT) devices has introduced critical security challenges due to resource constraints, heterogeneous architectures, and real-time communication requirements. Conventional software-based cryptographic implementations are often inadequate to meet the latency, throughput, and energy-efficiency demands of IoT environments. This paper presents a high-performance hardware implementation of an RSA encryption core on a Field Programmable Gate Array (FPGA) for secure data transmission in IoT networks. The proposed architecture leverages Montgomery Multiplication and an optimized square-and-multiply algorithm to efficiently perform 1024-bit modular exponentiation. The design is implemented in Verilog HDL and synthesized on a Xilinx Artix-7 FPGA, exploiting inherent hardware parallelism to achieve deterministic, low-latency encryption. Experimental evaluation demonstrates that the proposed system achieves an encryption latency of approximately 0.012 ms, throughput exceeding 80 Mbps, and efficient utilization of FPGA resources with moderate power consumption (~172 mW). The integration of UART and Bluetooth interfaces enables real-time end-to-end secure communication between IoT nodes. Compared to conventional software-based RSA implementations, the proposed hardware solution provides significantly improved performance, scalability, and resistance to timing-based vulnerabilities. The results validate the suitability of FPGA-based cryptographic accelerators for next-generation secure IoT and edge computing applications.